DocumentCode :
2422634
Title :
A planar electrode array in standard CMOS technology
Author :
Hubbard, Allyn E. ; Houghton, Blair P.
Author_Institution :
Coll. of Eng., Boston Univ., MA, USA
fYear :
1989
fDate :
12-14 Jun 1989
Firstpage :
168
Lastpage :
170
Abstract :
The development of a cheap, useful electrode array chip for scientific and medical applications is discussed. The chip is targeted for an experimental situation in which the neurological structure being studied could lie on or against the chip surface. The authors report on the minimum-sized electrode array which can reliably be built using standard CMOS fabrication techniques. The data suggest that the minimum-sized electrode array may be constructed using two-lambda glass cuts centered over six-lambda metal 2 regions separated by at least two lambda. A 64-electrode, multiplexed, recording-array chip, which is currently in fabrication, is also shown
Keywords :
CMOS integrated circuits; neural nets; neurological structure; planar electrode array; recording-array chip; six-lambda metal 2 regions; standard CMOS technology; two-lambda glass cuts; Biological materials; Biomedical electrodes; CMOS technology; Electric variables measurement; Fabrication; Glass; Neurons; Probes; Semiconductor device measurement; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
University/Government/Industry Microelectronics Symposium, 1989. Proceedings., Eighth
Conference_Location :
Westborough, MA
ISSN :
0749-6877
Type :
conf
DOI :
10.1109/UGIM.1989.37328
Filename :
37328
Link To Document :
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