DocumentCode :
242267
Title :
Implementation of discrete wavelet transform
Author :
Yuanfa Wang ; Zunchao Li ; Chuang Wang ; Lichen Feng ; Zhiyun Zhang
Author_Institution :
Dept. of Microelectron., Xi´an Jiaotong Univ., Xi´an, China
fYear :
2014
fDate :
28-31 Oct. 2014
Firstpage :
1
Lastpage :
3
Abstract :
The discrete wavelet transform (DWT) has a very wide and important application in digital signal processing. Daubechies order 4 wavelet transform (db4) is elected to discuss in this work. The advantages of DWT are analyzed, and a three-level Mallat algorithm is implemented in this paper, and db4 low-pass and high-pass filters are selected in each level. An orthogonal two-channel db4 filter of Lattice structure is selected and implemented,and the improved structure of the Mallat is designed in this paper. In order to verify the DWT which is designed, the EEG data is elected in this paper. The design is implemented in Verilog and simulation is performed on the Modelsim, and the FPGA implementation is verified on ISE13.3 platform.
Keywords :
digital signal processing chips; discrete wavelet transforms; electroencephalography; field programmable gate arrays; hardware description languages; high-pass filters; low-pass filters; wavelet transforms; DWT; Daubechies order 4 wavelet transform; EEG data; FPGA; ISEI3.3 platform; Modelsim; digital signal processing; discrete wavelet transform; high-pass filters; lattice structure; low-pass filters; orthogonal two-channel db4 filter; three-level Mallat algorithm; Abstracts; Discrete wavelet transforms; Signal resolution;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2014 12th IEEE International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4799-3296-2
Type :
conf
DOI :
10.1109/ICSICT.2014.7021561
Filename :
7021561
Link To Document :
بازگشت