Title :
A macromodel for a CMOS transmission gate
Author :
Hew, C.F. ; Thorbjornsen, A.R.
Author_Institution :
Dept. of Electr. Eng., Toledo Univ., OH, USA
Abstract :
A macromodel to simulate the output waveform of a CMOS transmission gate circuit is developed using a linear regression model. This model includes the coefficients for the input voltage, output voltage, and the interaction terms between the input and output voltages with load capacitor and gate transistor size. Three simulation examples have been computed for a transmission gate having a load capacitance of 1.0 pF. Simulation results are presented
Keywords :
CMOS integrated circuits; insulated gate field effect transistors; semiconductor device models; 1.0 pF; CMOS transmission gate; gate transistor size; input voltage; linear regression model; load capacitance; load capacitor; macromodel; output voltage; output waveform; CMOS technology; Capacitance; Circuit simulation; Computational modeling; Discrete transforms; Equations; Integrated circuit modeling; SPICE; Semiconductor device modeling; Threshold voltage;
Conference_Titel :
University/Government/Industry Microelectronics Symposium, 1989. Proceedings., Eighth
Conference_Location :
Westborough, MA
DOI :
10.1109/UGIM.1989.37331
