A fast multi-core virtual platform for performance evaluation of Network on Chip

Author

Xichao Ma ; Haijie Zhou ; Zongyan Wang ; Zhiyi Yu ; Xiaoyang Zeng

Author_Institution

Sch. of Microelectron., Fudan Univ., Shanghai, China

fYear

2014

fDate

28-31 Oct. 2014

Firstpage

1

Lastpage

3

Abstract

Network on Chip (NoC) is a new paradigm to address the challenges of System on Chip design. In this paper, we present a fast multi-core virtual platform which integrates OVP processor model, TLM-2.0 and NoC, to evaluate the system performance. We develop a unicast network with mesh topology and a multicast network with ring topology. In addition, Data Encryption Standard (DES) algorithm is implemented on the virtual platform, and the experiment results show that the ring topology is 32% faster than the mesh topology in Local Area Network (LAN) communication.

Keywords

cryptography; network topology; network-on-chip; performance evaluation; DES algorithm; LAN communication; NoC; OVP processor model; TLM-2.0; data encryption standard algorithm; fast multicore virtual platform; local area network communication; mesh topology; multicast network; network-on-chip; open virtual platform; performance evaluation; ring topology; system-on-chip design; unicast network; Abstracts; Acceleration; Kernel; Manuals; Ports (Computers); Sockets; System-on-chip;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuit Technology (ICSICT), 2014 12th IEEE International Conference on

Conference_Location

Guilin

Print_ISBN

978-1-4799-3296-2

Type

conf

DOI

10.1109/ICSICT.2014.7021582

Filename

7021582