• DocumentCode
    242320
  • Title

    A newrail-to-rail opamp with bulk-driven input stage and interleaved class-AB ouput stage

  • Author

    Ma Jianping ; Yuan Chen ; Tian Tong

  • Author_Institution
    Key Lab. of Wireless Sensor Network & Commun., Shanghai Inst. of Microsyst. & Inf. Technol., Shanghai, China
  • fYear
    2014
  • fDate
    28-31 Oct. 2014
  • Firstpage
    1
  • Lastpage
    3
  • Abstract
    This paper introduces a fully differential rail-to-rail input/output CMOS operational amplifier consisting of a bulk-driven input stage and an interleaved class-AB output stage. The input stage features a partial positive feedback loop to improve the gain and gain-bandwidth-product. Post-layout simulated results have shown that the proposed opamp, implemented in standard 65nm CMOS technology and with a 1.2V supply, obtains an open-loop DC gain higher than 72dB and gain-bandwidth-product above 15MHz when a 6pF load is connected to the differential output.
  • Keywords
    CMOS analogue integrated circuits; operational amplifiers; bulk-driven input stage; capacitance 6 pF; differential rail-to-rail input-output CMOS operational amplifier; gain-bandwidth-product; interleaved class-AB ouput stage; opamp; open-loop DC gain; partial positive feedback loop; post-layout simulation; size 65 nm; standard CMOS technology; voltage 1.2 V; Abstracts; CMOS integrated circuits; CMOS technology; Logic gates;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State and Integrated Circuit Technology (ICSICT), 2014 12th IEEE International Conference on
  • Conference_Location
    Guilin
  • Print_ISBN
    978-1-4799-3296-2
  • Type

    conf

  • DOI
    10.1109/ICSICT.2014.7021588
  • Filename
    7021588