Title :
An all-pass true time delay circuit for wideband phased array application
Author :
Lai He ; Wei Li ; Ning Li ; Junyan Ren
Author_Institution :
State Key Lab. of ASIC & Syst., Fudan Univ., Shanghai, China
Abstract :
In this work, we present an all-pass true time delay circuit realized in TSMC 65nm CMOS LP technology for wideband phased array application. The circuit is based on first order Pade Approximation and designed in a switched line topology. It exhibits a relative time delay of 1.22-ps to 13.42-ps at 24.25-26.65-GHz and the resolution of 1.22-ps is equivalent to the accuracy of 5-bit phase shifter. It is the first wideband TTD phase shifter in CMOS technology at frequency up to K-band. The power consuming is rather low as 6.8-mA from a 1.2-V power supply.
Keywords :
CMOS analogue integrated circuits; approximation theory; delay circuits; low-power electronics; CMOS LP technology; TSMC process; all-pass true time delay circuit; current 6.8 mA; first order Pade approximation; frequency 24.25 GHz to 26.65 GHz; size 65 nm; switched line topology; voltage 1.2 V; wideband TTD phase shifter; wideband phased array application; Abstracts; Application specific integrated circuits; Delay effects; Delays; Laboratories; Silicon germanium; Wideband;
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2014 12th IEEE International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4799-3296-2
DOI :
10.1109/ICSICT.2014.7021607