DocumentCode :
242367
Title :
NIO: A fast and accurate verification method for PVT variations
Author :
Minghua Li ; Dian Zhou ; Xuan Zeng
Author_Institution :
Dept. of Electr. Eng., Univ. of Texas at Dallas, Richardson, TX, USA
fYear :
2014
fDate :
28-31 Oct. 2014
Firstpage :
1
Lastpage :
3
Abstract :
In the Integrated Circuit (IC) design, sources of variations are composed of Process variation (P), Supply voltage (V), and Operation Temperature (T). These factors are normally combined and modeled as PVT corners. In today´s designs, up to hundreds or even thousands PVT corners are needed. This paper proposed a Nested Iterative Optimization (NIO) method to fast and accurate extracts worst-case of PVT corners. An average 21× speedup is achieved.
Keywords :
integrated circuit design; iterative methods; optimisation; IC design; Integrated Circuit design; NIO method; PVT variation; nested iterative optimization method; operation temperature; process variation; supply voltage; verification method; Abstracts; Parallel processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2014 12th IEEE International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4799-3296-2
Type :
conf
DOI :
10.1109/ICSICT.2014.7021608
Filename :
7021608
Link To Document :
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