MPEG-4 video codec on an ARM core and AMBA

Author

Park, J.H. ; Kim, I.K. ; Kim, S.M. ; Park, S.M. ; Koo, B.T. ; Shin, K.S. ; Seo, K.B. ; Cha, J.J.

Author_Institution

Micro-Electron. Tech. Lab., ETRI, Daejeon, South Korea

fYear

2001

fDate

2001

Firstpage

95

Lastpage

98

Abstract

This paper presents a MPEG-4 video codec (MoVa) that is based on an ARM core and AMBA. The MoVa includes an ARM embedded microprocessor and several hardwired modules, using pseudo-advanced microprocessors bus architecture (AMBA). The MoVa performs 30 frames/s of QCIF (SQCIF) or 15 frames/s of CIF at 27 MHz and meets the requirements for MPEG-4 SP@L2. Co-verification, HDL simulator and logic synthesis tools are used for hardware-software design and verification. It contains 1.7 million gates with a power consumption of about 0.5 W at 3.3 V

Keywords

embedded systems; hardware description languages; hardware-software codesign; large scale integration; logic design; microprocessor chips; modules; system buses; video codecs; video coding; 0.5 W; 128 kbit/s; 144 kbit/s; 3.3 V; ARM core; ARM7TDMI embedded microprocessor core; HDL; LSI implementation; MPEG-4 SP@L2; RISC processor; co-verification; hardware-software design; logic synthesis tools; pseudo-advanced microprocessors bus architecture; video codec; Application software; Bridge circuits; Circuit synthesis; Decoding; Energy consumption; MPEG 4 Standard; Master-slave; Microprocessors; SDRAM; Video codecs;

fLanguage

English

Publisher

ieee

Conference_Titel

MPEG-4. 2001 Proceedings of Workshop and Exhibition on

Conference_Location

San Jose, CA

Print_ISBN

0-7803-7165-8

Type

conf

DOI

10.1109/MPEG.2001.996457

Filename

996457