• DocumentCode
    2424483
  • Title

    A VLSI architecture for bicubic surface patch image generation

  • Author

    Chao, Philip C. ; Chern, Ming-Yang

  • Author_Institution
    AT&T Bell Lab., Naperville, IL, USA
  • fYear
    1989
  • fDate
    22-24 March 1989
  • Firstpage
    54
  • Lastpage
    58
  • Abstract
    A VLSI architecture is presented for generating ray-tracing images of bicubic surface in Bezier form by using the subdivision algorithm. It uses a set of tree transverse operators to find the nearest intersection between a surface patch and a ray by traversing the entire subdivision tree in preorder. This scheme retains the advantage of subdivision and substantially reduces the circuit area by eliminating the need for a stack to store control points of intermediate bicubic patches. It also eliminates the multiplications needed in the subdivision iteration. The time to traverse additional nodes is offset by the removal of the stack memory access time. The performance of the architecture is analyzed and compared with the alternative approaches.<>
  • Keywords
    VLSI; computerised picture processing; Bezier form; VLSI architecture; bicubic surface patch image generation; circuit area; performance; ray-tracing images; stack memory access time; subdivision algorithm; subdivision iteration; tree transverse operators; Equations; Image generation; Testing; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computers and Communications, 1989. Conference Proceedings., Eighth Annual International Phoenix Conference on
  • Conference_Location
    Scottsdale, AZ, USA
  • Print_ISBN
    0-8186-1918-x
  • Type

    conf

  • DOI
    10.1109/PCCC.1989.37360
  • Filename
    37360