Title :
A 5GHz, 108Mb/s 2Ã\x972 MIMO CMOS Transceiver
Author :
Palaskas, Y. ; Ravi, A. ; Pellerano, S. ; Carlton, B.R. ; Elmala, M.A. ; Bishop, R. ; Banerjee, G. ; Nicholls, R.B. ; Ling, S. ; Seddighrad, P. ; Suh, S.-Y. ; Taylor, S.S. ; Soumyanath, K.
Author_Institution :
Commun. Circuits Lab., Intel Corp., Hillsboro, OR
Abstract :
MIMO wireless transceivers employ multiple antennas and advanced digital signal processing to achieve higher data rates and superior link reliability compared to their single-antenna counterparts. This paper presents a 2times2 MlMO 5 GHz WLAN transceiver implemented in 90 nm CMOS. Crosstalk between the different MIMO channels is shown to have a detrimental effect on MIMO performance. Such crosstalk can occur at the radio channel, between the antennas, and at the radio IC. Several architectural and circuit techniques are described that minimize crosstalk between the multiple radio chains co-existing on the same silicon die. Measurements results demonstrate the increased data rate of the fabricated system compared with a conventional single-antenna system
Keywords :
CMOS integrated circuits; MIMO communication; crosstalk; field effect MMIC; microwave antenna arrays; signal processing; transceivers; wireless LAN; wireless channels; 108 Mbit/s; 5 GHz; MIMO CMOS transceiver; MIMO channels; MIMO wireless transceivers; MlMO WLAN transceiver; advanced digital signal processing; multiple antennas; multiple radio chains; radio IC; radio channel; superior link reliability; Circuits; Crosstalk; Digital signal processing; Frequency; MIMO; Polarization; Receiving antennas; Transceivers; Transmitters; Transmitting antennas;
Conference_Titel :
Radio and Wireless Symposium, 2007 IEEE
Conference_Location :
Long Beach, CA
Print_ISBN :
1-4244-0445-2
Electronic_ISBN :
1-4244-0445-2
DOI :
10.1109/RWS.2007.351812