DocumentCode :
2424983
Title :
Technique of modeling and defectiveness estimation in structures of integrated circuit
Author :
Pavlysh, Volodymyr ; Danchyshyn, Igor ; Korzh, Roman ; Zakalyk, Lubov ; Dronyuk, Myroslav
Author_Institution :
EMCIT Dept., Nat. Univ. "Lvivska Politechnika", Lviv, Ukraine
fYear :
2003
fDate :
18-22 Feb. 2003
Firstpage :
50
Abstract :
Summary form only given. In this paper, a defectiveness estimation modeling technique for microelectronic device structures is proposed.
Keywords :
integrated circuit modelling; integrated circuit testing; semiconductor process modelling; IC modeling; defectiveness estimation; electronic mean; microelectronic device structures; physical-technological models; Automation; Circuit testing; Electric variables measurement; Hybrid integrated circuits; Integrated circuit modeling; Microelectronics; Paper technology; Semiconductor device modeling; Semiconductor process modeling; Thin film circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
CAD Systems in Microelectronics, 2003. CADSM 2003. Proceedings of the 7th International Conference. The Experience of Designing and Application of
Print_ISBN :
966-553-278-2
Type :
conf
DOI :
10.1109/CADSM.2003.1254978
Filename :
1254978
Link To Document :
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