DocumentCode :
2425093
Title :
Detection of upset induced execution errors in microprocessors
Author :
Khan, Mohammad Ziaullah ; Tront, Joseph G.
Author_Institution :
Bradley Dept. of Electr. Eng., Virginia Polytech. Inst. & State Univ., Blacksburg, VA, USA
fYear :
1989
fDate :
22-24 March 1989
Firstpage :
82
Lastpage :
86
Abstract :
The authors discuss the types of errors in a radiation environment and propose fault models for instruction execution errors. A scheme is suggested for detecting execution errors through the online monitoring of the system. The theoretical estimate for the error coverage of the proposed scheme is about 85% of all single-bit errors in an instruction word. The exact error coverage will vary as it depends on the nature of program under execution on the microprocessor. At present the design of the watchdog processor hardware is in progress.<>
Keywords :
computer testing; error detection; fault location; microprocessor chips; radiation hardening (electronics); error detection; exact error coverage; fault models; instruction word; microprocessors; online monitoring; radiation environment; upset induced execution errors; Capacitance; Circuit faults; Control systems; Digital systems; Electromagnetic transients; Error correction; Fault detection; Microprocessors; Satellites; Single event upset;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computers and Communications, 1989. Conference Proceedings., Eighth Annual International Phoenix Conference on
Conference_Location :
Scottsdale, AZ, USA
Print_ISBN :
0-8186-1918-x
Type :
conf
DOI :
10.1109/PCCC.1989.37365
Filename :
37365
Link To Document :
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