An Efficient CMOS On-Chip Antenna Structure for System in Package Transceiver Applications

Author

Ahmadi, Mohammad Reza Nezhad ; Safavi-Naeini, Safieddin ; Zhu, Lei

Author_Institution

Dept. of Electr. Eng., Waterloo Univ., Ont.

fYear

2007

fDate

9-11 Jan. 2007

Firstpage

487

Lastpage

490

Abstract

An efficient on-chip antenna structure in CMOS technology for system in package integration is presented. The antenna consists of a slot radiator on the top metal layer of the technology coupled to a rectangular dielectric resonator above the slot. The cavity backed slot configuration is used to isolate the antenna from the substrate. This configuration blocks the antenna interference through the substrate to the other RF circuits on the same substrate. Radiation efficiency of about 40% is achieved on a lossy silicon substrate without removing the lossy silicon under the antenna

Keywords

CMOS analogue integrated circuits; antenna radiation patterns; cavity resonators; dielectric resonator antennas; radiofrequency integrated circuits; slot antennas; system-in-package; transceivers; CMOS on-chip antenna structure; antenna interference; cavity backed slot configuration; metal layer; rectangular dielectric resonator; system in package; transceiver applications; CMOS technology; Coupling circuits; Dielectric resonator antennas; Dielectric substrates; Isolation technology; Packaging; Silicon; Slot antennas; System-on-a-chip; Transceivers; CMOS analog integrated circuits; On-chip antenna; transceivers;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio and Wireless Symposium, 2007 IEEE

Conference_Location

Long Beach, CA

Print_ISBN

1-4244-0445-2

Electronic_ISBN

1-4244-0445-2

Type

conf

DOI

10.1109/RWS.2007.351874

Filename

4160757