Automatic generation of symmetric transparent March memory tests

Author

Yarmolik, V.N. ; Sokol, B.

fYear

2003

fDate

18-22 Feb. 2003

Firstpage

226

Lastpage

229

Abstract

High-density memories are often used in safety-critical microelectronic systems. Transparent March algorithms allow realizing periodic testing of memory while preserving its contents. This paper presents the novel technique of automatic symmetric transparent algorithms generation. It is based on selecting fault detection and hiding conditions and analysis of fault manifestation map.

Keywords

automatic test pattern generation; built-in self test; deterministic algorithms; fault simulation; integrated circuit testing; random-access storage; March sequence; automatic generation; deterministic memory BIST; fault detection conditions; fault hiding conditions; fault manifestation map; fault models; high-density memories; symmetric transparent March memory tests; symmetry breaks; transparent March algorithms; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Electrical fault detection; Fault detection; Random access memory; Read-write memory; System testing; Writing;

fLanguage

English

Publisher

ieee

Conference_Titel

CAD Systems in Microelectronics, 2003. CADSM 2003. Proceedings of the 7th International Conference. The Experience of Designing and Application of

Print_ISBN

966-553-278-2

Type

conf

DOI

10.1109/CADSM.2003.1255041

Filename

1255041

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2426206