• DocumentCode
    2426351
  • Title

    A memory-layout oriented run-time technique for locality optimization on SMPs

  • Author

    Yan, Yong ; Zhang, Xiaodong ; Zhang, Zhao

  • Author_Institution
    HAL Comput. Syst. Inc., Campbell, CA, USA
  • fYear
    1998
  • fDate
    10-14 Aug 1998
  • Firstpage
    189
  • Lastpage
    196
  • Abstract
    Exploiting locality at run-time is a complementary approach to a compiler approach for those applications with dynamic memory access patterns. This paper proposes a memory-layout oriented approach to exploit cache locality for parallel loops at run-time on symmetric multi-processor (SMP) systems. Guided by application-dependent hints and the targeted cache architecture, it reorganizes and partitions a parallel loop through shrinking and partitioning the memory-access space of the loop at run-time. In the generated task partitions, the data sharing among partitions is minimized and the data reuse in a partition is maximized. The execution of tasks in partitions is scheduled in an adaptive and locality-preserved way to achieve balanced execution, for minimizing the execution time of applications by trading off load balance and locality. Based on simulation and measurement, we show our run-time approach can achieve comparable performance with the compiler optimizations for two applications, whose load balance and cache locality can be well optimized by the tiling and other program transformations. However our experimental results also show that our approach is able to significantly improve the memory performance for the applications with dynamic memory access patterns. This type of programs are usually hard to be optimized by compilers
  • Keywords
    cache storage; multiprocessing systems; optimising compilers; parallel programming; program control structures; resource allocation; scheduling; software performance evaluation; cache locality; compiler optimizations; data reuse; data sharing; dynamic memory access patterns; execution time; load balance; locality optimization; memory performance; memory-layout; parallel loops; performance; program compiler; program transformations; run-time technique; symmetric multiprocessor systems; task partitions; tiling; Application software; Computer science; Delay; Educational institutions; Hardware; Multiprocessing systems; Optimizing compilers; Program processors; Runtime; Sun;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel Processing, 1998. Proceedings. 1998 International Conference on
  • Conference_Location
    Minneapolis, MN
  • ISSN
    0190-3918
  • Print_ISBN
    0-8186-8650-2
  • Type

    conf

  • DOI
    10.1109/ICPP.1998.708484
  • Filename
    708484