A novel A/D converter for high-resolution and high-speed applications

This paper describes a new and novel subranging analog-to-digital converter based on parallel comparison and subtraction. A high-resolution and high-speed converter has been achieved as a result of elimination of input sample-and-hold circuit and by performing subtraction and comparison operation simultaneously. The converter performs a 3-bits conversion followed by standard flash conversion, for example of 8-bits. The first 3-bit cell has been designed elaborately in order to minimize the errors in an entire A/D converter. A high speed subtracter which employed an operational amplifier with 90-dB DC gain and 900 MHz gain-bandwidth (GBW) and high speed and low offset comparator which uses self calibrating technique are presented. These circuits are designed in 0.8 μm BiCMOS technology. In our implementation, A/D converter operates at 1 MHz with signal-to-noise ratio of 62 dB. The nonlinearity errors, INL and DNL, are less than 1 LSB in an 11-bit A/D converter The results show the possibility of increasing the resolution of 3-bits for any converter. So, a pre-processing stage is proposed for the resolution enhancement. Therefore, the A/D converter with resolution more than 15-bits is possible with this technique