DocumentCode
2427262
Title
The influence of IMD bake process on buried channel PMOS hot carrier reliability of advanced DRAM
Author
Ahn, S.J. ; Lee, J.K. ; Jung, G.T. ; Cho, C.H. ; Hwang, Y.S. ; Shin, D.W. ; Jeong, H.S. ; Kim, Kinam
Author_Institution
Semicond. R&D Center, Samsung Electron. Co. Ltd., Kyunggi, South Korea
fYear
2002
fDate
2002
Firstpage
365
Lastpage
368
Abstract
We investigated the influence of the SOG deposition with two kinds of curing process on the hot carrier reliability of buried channel (BC) PMOSFET. It was found that the vacuum bake induced the effective negative charges in the trench sidewall oxide and degraded P+ active isolation and PMOS hot carrier reliability.
Keywords
DRAM chips; MOSFET; dielectric thin films; hot carriers; isolation technology; semiconductor device reliability; DRAM; P+ active isolation; SOG deposition; buried channel PMOSFET; curing process; hot carrier reliability; inter metal dielectric; vacuum bake; Acceleration; Dielectrics; Etching; Hot carriers; MOSFET circuits; Oxidation; Random access memory; Stress; Temperature; Thermal degradation;
fLanguage
English
Publisher
ieee
Conference_Titel
Reliability Physics Symposium Proceedings, 2002. 40th Annual
Print_ISBN
0-7803-7352-9
Type
conf
DOI
10.1109/RELPHY.2002.996661
Filename
996661
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