• DocumentCode
    242763
  • Title

    Secure Microcontroller with On-Chip Hierarchical Code Validator for Firmware Authentication

  • Author

    Daejin Park ; Meng Di Yin ; Jeonghun Cho

  • Author_Institution
    Sch. of Electron. Eng., Kyungpook Nat. Univ., Daegu, South Korea
  • fYear
    2014
  • fDate
    28-30 Oct. 2014
  • Firstpage
    1
  • Lastpage
    3
  • Abstract
    A secure microcontroller architecture has been proposed to protect the chip-level intrusion by injecting invalid firmware. The safe execution of the embedded firmware in microcontrollers is becoming important for applications requiring safety-critical operations, such as a safety-critical automotive controller, human-interactive interface. The chip-level instruction injection to bypass the original execution flow is a powerful method to acquire the privileged authority of firmware-controlled embedded systems. A code memory integrity validation accelerator for firmware authentication is proposed to provide fast hierarchical identification. The proposed validator, which is based on sector-segmented padding information, is integrated as a co-processor with the main CPU. The cyclic-redundancy code (CRC) as a fingerprint of the original code is inserted into the on-chip fab-programmed secure region to provide the sector-segmented code validation in long-range address space. The error-correcting code to identify invalid region in detail are applied to 64KB flash memory. The customized 8051-based microcontroller with the proposed accelerator is synthesized with 25,000 2-input NAND gates on 0.18um CMOS embedded-flash process.
  • Keywords
    CMOS logic circuits; authorisation; coprocessors; embedded systems; firmware; flash memories; logic gates; microcontrollers; 0.18um CMOS embedded-flash process; 2-input NAND gates; 8051-based microcontroller; CPU; chip-level instruction injection; chip-level intrusion protection; code memory integrity validation accelerator; coprocessor; cyclic-redundancy code; execution flow; fast hierarchical identification; firmware authentication; firmware-controlled embedded systems; flash memory; human-interactive interface; invalid firmware injection; long-range address space; on-chip fab-programmed secure region; on-chip hierarchical code validator; safety-critical automotive controller; sector-segmented code validation; sector-segmented padding information; secure microcontroller architecture; Ash; Computer architecture; Error correction codes; Hardware; Logic gates; Microcontrollers; System-on-chip;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    IT Convergence and Security (ICITCS), 2014 International Conference on
  • Conference_Location
    Beijing
  • Type

    conf

  • DOI
    10.1109/ICITCS.2014.7021810
  • Filename
    7021810