DocumentCode
2427709
Title
Analysis of interrupt handling schemes in real-time systems
Author
Fawaz, Ayman ; Varaiya, Pravin ; Walrand, Jean
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
fYear
1989
fDate
22-24 March 1989
Firstpage
260
Lastpage
263
Abstract
In a real-time system where a microprocessor performs several tasks in response to the occurrence of external events, the execution of a task may be delayed if the processor is busy. This delay presents a problem as the task has to be performed within a fixed period of time. In this paper, the worst case queuing delay of a task under four interrupt handling schemes is analyzed. For every scheme, a sufficient condition is formulated for the system to satisfy certain real-time constraints.<>
Keywords
interrupts; operating systems (computers); real-time systems; interrupt handling schemes; real-time systems; sufficient condition; worst case queuing delay; Clocks; Delay effects; Hardware; Microprocessors; Processor scheduling; Queueing analysis; Real time systems; Signal processing; Software architecture; Sufficient conditions;
fLanguage
English
Publisher
ieee
Conference_Titel
Computers and Communications, 1989. Conference Proceedings., Eighth Annual International Phoenix Conference on
Conference_Location
Scottsdale, AZ, USA
Print_ISBN
0-8186-1918-x
Type
conf
DOI
10.1109/PCCC.1989.37397
Filename
37397
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