DocumentCode :
2428500
Title :
Optimization of the power/ground network wire-sizing and spacing based on sequential network simplex algorithm
Author :
Wang, TingYuan ; Chen, Charlie Chung-Ping
Author_Institution :
Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
fYear :
2002
fDate :
2002
Firstpage :
157
Lastpage :
162
Abstract :
This paper presents a fast algorithm to optimize both the widths and lengths of power/ground networks under reliability and power dip/ground bounce constraints. The space-sizing which allows the length to change gives more flexibility in solving practical problems. There are two major contributions of this paper. First, we prove that for general topology, a relaxed version of this problem is also convex. Second, we present the sequential network simplex algorithm which can solve those problems with extreme efficiency. Experimental results on several large scale problems, using a PC with a 500-MHZ Pentium III processor, show that our algorithm can solve problems with hundreds of thousands of variables within a few minutes and has a speed improvement of 25+ over sequential linear programming. Experimental results also show that about 50% of the power delivery area can be reduced using our algorithm.
Keywords :
VLSI; integrated circuit reliability; linear programming; logic CAD; low-power electronics; sequential circuits; wiring; large scale problems; power delivery area; power dip/ground bounce constraints; power/ground network wire-sizing; reliability constraints; sequential network; simplex algorithm; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Quality Electronic Design, 2002. Proceedings. International Symposium on
Print_ISBN :
0-7695-1561-4
Type :
conf
DOI :
10.1109/ISQED.2002.996721
Filename :
996721
Link To Document :
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