DocumentCode :
2428840
Title :
Base/gate drive suppression methods for NPC inverter legs
Author :
Yoon, Ji Taek ; Park, In Gyu ; Park, Jong Keun
Volume :
3
fYear :
1996
fDate :
5-10 Aug 1996
Firstpage :
1784
Abstract :
The base/gate drive suppression methods for the voltage source inverter leg are those which suppress base/gate drives of either of the two switching devices of the leg. These methods have the merits that they do not have the conventional dead time problem, raise the reliability of the leg, and others. In this paper, the concept of these methods is extended to the NPC inverter leg, so that two types of base/gate drive suppression methods for the NPC inverter leg are proposed. The one is the output current polarity detection type and the other is the output voltage polarity detection type. These two methods have nearly the same performance, but the latter is easier to implement than the former
Keywords :
driver circuits; invertors; reliability; switching circuits; NPC inverter legs; base drive suppression method; gate drive suppression methods; neutral point clamped inverter; output current polarity detection; output voltage polarity detection; reliability improvement; switching devices; voltage source inverter leg; Circuit faults; FETs; Instruments; Insulated gate bipolar transistors; Inverters; Leg; Switches; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Industrial Electronics, Control, and Instrumentation, 1996., Proceedings of the 1996 IEEE IECON 22nd International Conference on
Conference_Location :
Taipei
Print_ISBN :
0-7803-2775-6
Type :
conf
DOI :
10.1109/IECON.1996.570738
Filename :
570738
Link To Document :
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