Adaptive resolution ADC array for neural implant

Author

O´Driscoll, Stephen ; Meng, Teresa H.

Author_Institution

Dept. of Electr. Eng., Stanford Univ., Stanford, CA, USA

fYear

2009

fDate

3-6 Sept. 2009

Firstpage

1053

Lastpage

1056

Abstract

This paper describes an ADC array for an implantable prosthetic processor which digitizes neural signals sensed by a microelectrode array. The ADC array consists of 96 variable resolution ADC base cells. The base ADC has been implemented in 0.13 mum CMOS as a 100 kS/s SAR ADC whose resolution can be varied from 3 to 8-bits with corresponding power consumption of 0.23 muW to 0.90 muW achieving an ENOB of 7.8 at the 8-bit setting. The resolution of each ADC cell in the array is varied according to neural data content of the signal from the corresponding electrode. Resolution adaptation reduces power consumption by a factor of 2.3 whilst maintaining an effective 7.8-bit resolution across all channels.

Keywords

CMOS digital integrated circuits; analogue-digital conversion; biomedical electrodes; biomedical electronics; low-power electronics; neural chips; neurophysiology; prosthetics; CMOS; adaptive resolution ADC array; implantable prosthetic processor; microelectrode array; neural implant; neural signals; power 0.23 muW to 0.90 muW; size 0.13 mum; Analog-Digital Conversion; Brain; Electroencephalography; Equipment Design; Equipment Failure Analysis; Prostheses and Implants; Reproducibility of Results; Sensitivity and Specificity; Signal Processing, Computer-Assisted; Telemetry;

fLanguage

English

Publisher

ieee

Conference_Titel

Engineering in Medicine and Biology Society, 2009. EMBC 2009. Annual International Conference of the IEEE

Conference_Location

Minneapolis, MN

ISSN

1557-170X

Print_ISBN

978-1-4244-3296-7

Electronic_ISBN

1557-170X

Type

conf

DOI

10.1109/IEMBS.2009.5335410

Filename

5335410