Title :
High frequency 700V PowerBrane LIGBTs in 0.35µm bulk CMOS technology
Author :
Trajkovic, T. ; Udugampola, N. ; Pathirana, V. ; Mihaila, A. ; Udrea, F. ; Amaratunga, G.A.J. ; Koutny, Bill ; Ramkumar, K. ; Geha, S.
Author_Institution :
Cambridge Semicond. Ltd.-CamSemi, Cambridge, UK
Abstract :
A self-isolating, lateral IGBT device with high voltage blocking capability (>700 V), high on-state current density (150 A/cm2 at Vds=4 V) and very fast turn-off (< 50 ns), realized in membrane on bulk Si technology is reported here. The device has been manufactured using a standard 5 V, 0.35 mum bulk CMOS process on 8" wafers with the addition of two masks: i) n-drift for the HV blocking region and ii) back-side Deep RIE (DRIE) for membrane formation. In comparison to PowerBrane on SOI, earlier reported by us, PowerBrane on bulk Si LIGBTs offer higher maximum power density due to better thermal dissipation and more robust operation including unclamped inductive switching and short circuit capability. Reliability of bulk-Si PowerBrane chips in plastic packages has been evaluated through HTRB tests and no failures have been observed after more than 1000 hours of stress. The DRIE step used for selective removal of portions of the silicon substrate, the key feature of PowerBrane technology, offers an effective solution for isolation of the high-voltage power LIGBT(s) from the control circuitry in monolithically integrated Power ICs. In addition, use of bulk Si wafers instead of more expensive SOI substrates reduces the manufacturing costs of PowerBrane-based Power ICs without compromising performance.
Keywords :
CMOS integrated circuits; insulated gate bipolar transistors; monolithic integrated circuits; power integrated circuits; semiconductor device reliability; sputter etching; CMOS technology; PowerBrane LIGBT; deep RIE; high voltage blocking capability; membrane formation; monolithically integrated power IC; on-state current density; plastic packages; reliability; size 0.35 mum; thermal dissipation; voltage 700 V; Biomembranes; CMOS process; CMOS technology; Current density; Frequency; Insulated gate bipolar transistors; Manufacturing processes; Power integrated circuits; Robustness; Voltage;
Conference_Titel :
Power Semiconductor Devices & IC's, 2009. ISPSD 2009. 21st International Symposium on
Conference_Location :
Barcelona
Print_ISBN :
978-1-4244-3525-8
Electronic_ISBN :
1943-653X
DOI :
10.1109/ISPSD.2009.5158063