DocumentCode :
2431009
Title :
Communication in macrochips using silicon photonics for high-performance and low-energy computing
Author :
Cunningham, John E. ; Krishnamoorthy, Ashok V. ; Zheng, Xuezhe ; Li, Guoliang ; Ho, Ron ; Lexau, Jon ; Shubin, Ivan ; Raj, Kannan
Author_Institution :
Microelectron. Group, Sun Microsyst., San Diego, CA, USA
fYear :
2009
fDate :
28-30 April 2009
Firstpage :
35
Lastpage :
35
Abstract :
In this paper microchip technology was explored. In order to scale chip-to-chip I/O to the required communication performance and energy, optical interconnects between chips based on CMOS-compatible silicon photonics was proposed. One key component is an inter-chip optical coupler supporting wavelength-division multiplexing (WDM) functionality that enables face-to-face optical proximity communication (OPxC).The high-fidelity 10 Gb/s OPxC with reflecting mirrors micro-machined into silicon and co-integrated with low-loss SOI waveguides for packaged chip-to-chip communication was demonstrated. These devices were integrated through dry etching rib waveguides 8 mum wide that tapered to 13 mum wide and subsequently truncated with a wet-etched micro-mirror facet forming a 54deg angle with the (100) silicon surface. Light in waveguides on one chip can couple to waveguides on a second, facing chip upon face-to-face positioning so that the reflecting mirrors form a coupled pair and complete an OPxC hop. Inside a package, a chip-to-chip OPxC hop was measured to have optical coupling loss of 4dB; with precision aligned chips using a nano-positioning stage. When OPxC hops associated with the package are inserted into standard 10 Gbps links, it was shown that RMS jitter and amplitude metrics for data eye quality to be essentially unchanged (within 1%). This package-based self-alignment mechanism enables chip packages for many different classes of proximity communication. In this presentation, other critical components of chip-to-chip optical interconnects, including modulators and detectors, were also addressed.
Keywords :
CMOS integrated circuits; electronic engineering computing; etching; integrated optoelectronics; micromachining; micromirrors; nanophotonics; optical communication; optical interconnections; silicon; wavelength division multiplexing; (100) silicon surface; CMOS-compatible silicon photonics; RMS jitter; amplitude metrics; bit rate 10 Gbit/s; chip-to-chip I-O communication; chip-to-chip optical interconnects; detectors; dry etching rib waveguides; face-to-face optical proximity communication; high-performance computing; interchip optical coupler; loss 4 dB; low-energy computing; low-loss SOI waveguide co-integration; macrochip communication; microchip technology; micromachining; modulators; nanopositioning stage; optical coupling; optical interconnects; package-based self-alignment mechanism; reflecting mirrors; silicon photonics; size 13 mum; size 8 mum; standard links; wavelength-division multiplexing; wet-etched micro-mirror facet; Mirrors; Optical computing; Optical coupling; Optical devices; Optical interconnections; Optical waveguides; Packaging; Photonics; Silicon; Wavelength division multiplexing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, Automation and Test, 2009. VLSI-DAT '09. International Symposium on
Conference_Location :
Hsinchu
Print_ISBN :
978-1-4244-2781-9
Electronic_ISBN :
978-1-4244-2782-6
Type :
conf
DOI :
10.1109/VDAT.2009.5158088
Filename :
5158088
Link To Document :
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