Title :
iScan: Indirect-access scan test over HOY test platform
Author :
Tzeng, Chao-Wen ; Lin, Chun-Yen ; Huang, Shi-Yu ; Huang, Chih-Tsun ; Liou, Jing-Jia ; Ma, Hsi-Pin ; Huang, Po-Chiun ; Wu, Cheng-Wen
Author_Institution :
Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan
Abstract :
In this paper, we introduce a new test paradigm called indirect-access scan test, demonstrated over the HOY test platform [12]. Unlike the traditional ATE-based testing, the test data in this paradigm are sent to the chip under test via packets over a single indirect channel. Although there is extra test time overhead for establishing the store-and-forward communication, it offers almost unlimited test memory - a highly desirable property since the large volume of test data today could easily blow up a traditional ATEs test memory. In addition to demonstrating the feasibility of this new paradigm, we also show that its efficiency can be substantially improved by two schemes; i.e., primary input (PI) data encoding and dynamic packet formatting. For a design with 155 K gates, the speed-up achieved can be more than 50 X.
Keywords :
automatic testing; integrated circuit testing; HOY test platform; dynamic packet formatting; iScan; indirect access scan test; primary input data encoding; Chaotic communication; Circuit testing; Communication system control; Computer science; Contracts; Electronic equipment testing; Integrated circuit testing; Performance evaluation; Pins; Timing; HOY Test Platform; Indirect-Access Testing; Scan Test; Test Compression;
Conference_Titel :
VLSI Design, Automation and Test, 2009. VLSI-DAT '09. International Symposium on
Conference_Location :
Hsinchu
Print_ISBN :
978-1-4244-2781-9
Electronic_ISBN :
978-1-4244-2782-6
DOI :
10.1109/VDAT.2009.5158095