Title :
Fully on chip low dropout (LDO) voltage regulator with improved transient response
Author :
Dwibedy, Debasish ; Alapati, Suresh ; Patri, Sreeharirao ; Ksr, Krishnaprasad
Author_Institution :
Dept. of Electron. & Commun. Eng., Nat. Inst. of Technol. Warangal, Telangana, India
Abstract :
A novel full on-chip low dropout linear regulator is presented in this paper. This LDO is designed with a double recycling folded cascode error amplifier that offers very good stability. A refined frequency compensation scheme is used which maintains LDO stable over entire load current range i.e. 0-100mA and results a fast transient response. The overshoot/ undershoot in the output voltage under the extreme load transients are 49.7mV/98.65mV respectively. The settling time is only 500nS. A double recycled folded cascode is used to improve gain, and slew rate by recycling the shunt current sources of conventional folded cascode amplifier without increasing area. The LDO presented requires a bias current of 68μA and 200mV dropout voltage and is designed in 180nm technology. The LDO presented is useful for Digital integrated circuit where low transient is necessary for robust application.
Keywords :
amplifiers; digital integrated circuits; integrated circuit design; transient response; voltage regulators; LDO voltage regulator; current 68 muA; digital integrated circuit; double recycling folded cascode error amplifier; frequency compensation scheme; linear regulator; on chip low dropout voltage regulator; size 180 nm; slew rate; time 500 ns; transient response; voltage 200 mV; voltage 49.7 mV; voltage 98.65 mV; Capacitors; Recycling; Regulators; System-on-chip; Transient response; Transistors; Voltage control; Double recycling folded cascode error amplifier; High slew rate; low-dropout regulator; low-quiescent current;
Conference_Titel :
TENCON 2014 - 2014 IEEE Region 10 Conference
Conference_Location :
Bangkok
Print_ISBN :
978-1-4799-4076-9
DOI :
10.1109/TENCON.2014.7022398
