DocumentCode :
2431484
Title :
A post-manufacturing language-adaptive embedded processor system
Author :
Jung, Yong-Kyu
Author_Institution :
Electrical and Computer Engineering, Gannon University, USA
fYear :
2011
fDate :
6-9 June 2011
Firstpage :
161
Lastpage :
168
Abstract :
Language is a continuously adapting entity. As new modes of expression and ideas arise, humans are capable of extending the boundaries of language despite time-consuming and costly processes. Yet, the boundaries for processors are rigidly established upon manufacturing. A processor utilizing a static language such as an instruction set is unlikely to last long amongst rapidly advancing technologies, and valuable time and energy are lost due to the use of outmoded forms to express new ideas. In attempts to overcome such limitations and inefficiencies, new instructions are continuously added to the instruction set for greater adaptability to support swiftly evolving applications. Unfortunately, this process requires time-consuming and costly manufacturing, and even this level of adaptability is unsatisfactory and results in a processor that falls short of its intended potential. Since post-manufacturing instruction set customization is generally impossible, an instruction set usually comprises hundreds of instructions while only about 20% of instructions are typically used in most of applications. We have developed a unique language-adaptive embedded processor system for post-manufacturing code optimization and synthesis, resulting in unlimited programmability, innovative instruction cache usage, and significant enhancement (i.e., 5.67× smaller space, 3.14× less energy, and 2.32× faster) alongside simultaneously increased performance.
Keywords :
cache storage; embedded systems; instruction sets; microprocessor chips; optimisation; program diagnostics; instruction cache usage; instruction set; language adaptive embedded processor system; post manufacturing code optimization; post manufacturing code synthesis; post manufacturing language adaptive embedded processor system; static language; Assembly; Benchmark testing; Decoding; Hardware; Microarchitecture; Optimization; Software;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Adaptive Hardware and Systems (AHS), 2011 NASA/ESA Conference on
Conference_Location :
San Diego, CA
Print_ISBN :
978-1-4577-0598-4
Electronic_ISBN :
978-1-4577-0597-7
Type :
conf
DOI :
10.1109/AHS.2011.5963931
Filename :
5963931
Link To Document :
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