• DocumentCode
    2431849
  • Title

    Analytic I-V model for single-electron transistors

  • Author

    Wang, X. ; Porod, W.

  • Author_Institution
    Dept. of Electr. Eng., Notre Dame Univ., IN, USA
  • fYear
    2000
  • fDate
    22-25 May 2000
  • Firstpage
    71
  • Lastpage
    72
  • Abstract
    Single-electron transistors (SET) offer the promise of ultra-high integration densities and ultra-low power consumption. We present an analytical model for the I-V characteristics of a single-electron transistor, which may be incorporated in a conventional SPICE simulator. Our model takes as its input the physical SET characteristics (capacitances and tunnel resistances, which may be determined experimentally), and it yields I-V curves which are in agreement with the ones obtained from the full-scale Monte Carlo simulations.
  • Keywords
    SPICE; semiconductor device models; single electron transistors; SET; analytic I-V model; capacitances; conventional SPICE simulator; single-electron transistors; tunnel resistances; Analytical models; Circuit simulation; Cryogenics; Energy consumption; Fabrication; Monte Carlo methods; SPICE; Single electron transistors; Temperature; Tunneling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computational Electronics, 2000. Book of Abstracts. IWCE Glasgow 2000. 7th International Workshop on
  • Conference_Location
    Glasgow, UK
  • Print_ISBN
    0-85261-704-6
  • Type

    conf

  • DOI
    10.1109/IWCE.2000.869928
  • Filename
    869928