New low noise FET structure

Author

Truitt, A. ; Heston, D. ; Klein, J.

Author_Institution

Texas Instrum. Inc., Dallas, TX, USA

fYear

1990

fDate

8-10 May 1990

Firstpage

751

Abstract

A novel topology for the FET that has demonstrated better minimum noise figure than the conventional pi-gate low-noise FET is presented. This topology can be incorporated into monolithic circuits and allows easy implementation of feedback and self-bias networks. The Spider FET topology is ideally suited for the 0.25- mu m gate processes and HEMT (high-electron mobility transistor) technology to achieve improved minimum-noise figures. The Spider FET is described, its underlying theory is explained, and the results of a comparison to a standard process, 0.5- mu m pi-gate FET and a commercial 0.35- mu m pi-gate HEMT are presented.<>

Keywords

MMIC; Schottky gate field effect transistors; electron device noise; equivalent circuits; field effect integrated circuits; field effect transistors; high electron mobility transistors; 0.25 micron; HEMT; MESFET; MMIC application; Spider FET topology; feedback networks; high-electron mobility transistor; low noise FET structure; lumped element model; monolithic circuits; quarter micron gate process; self-bias networks; Contact resistance; FETs; Feeds; Fingers; HEMTs; Instruments; Noise figure; Parasitic capacitance; Routing; Topology;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Symposium Digest, 1990., IEEE MTT-S International

Conference_Location

Dallas, TX

Type

conf

DOI

10.1109/MWSYM.1990.99687

Filename

99687