• DocumentCode
    2431929
  • Title

    Software-enabled design visibility enhancement for failure analysis process improvement

  • Author

    Yen, Chia-Chih ; Lin, Shen-Tien ; Yang, Kai ; Peillat, Jerome ; Gibson, Paul ; Auvray, Etienne

  • Author_Institution
    Springsoft Inc., Taiwan
  • fYear
    2009
  • fDate
    28-30 April 2009
  • Firstpage
    187
  • Lastpage
    190
  • Abstract
    Traditional failure analysis (FA) process proceeds by investigating the tester results of several suspected silicon signals, and then applying CAD tools to navigate and compare pre-silicon design behaviors. However, existing CAD tools usually lack of design visibility due to the imperfect link between test and design environments. In this paper, we introduce a series of design visibility enhancement tools to augment FA process flow. These tools not only feature design comprehension and logic tracing capability, but also expand and correlate silicon data to design functionality. With the seamless visibility enhancement environment, we show the FA process can be performed more efficiently.
  • Keywords
    CAD; failure analysis; fault tolerant computing; CAD tools; design functionality; failure analysis process improvement; feature design comprehension; logic tracing capability; pre-silicon design behavior; seamless visibility enhancement environment; silicon signals; software-enabled design visibility enhancement; Failure analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, Automation and Test, 2009. VLSI-DAT '09. International Symposium on
  • Conference_Location
    Hsinchu
  • Print_ISBN
    978-1-4244-2781-9
  • Electronic_ISBN
    978-1-4244-2782-6
  • Type

    conf

  • DOI
    10.1109/VDAT.2009.5158126
  • Filename
    5158126