DocumentCode :
2432445
Title :
Scalable and low cost design approach for variable block size motion estimation (VBSME)
Author :
Parandeh-Afshar, H. ; Brisk, P. ; Ienne, P.
Author_Institution :
Sch. of Comput. & Commun. Sci., Ecole Polytech. Federate de Lausanne (EPFL), Lausanne, Switzerland
fYear :
2009
fDate :
28-30 April 2009
Firstpage :
271
Lastpage :
274
Abstract :
Variable block size motion estimation (VBSME) in state-of-the-art video coding standards is one of the key features which improves the coding efficiency significantly compared to the previous standards. VBSME hardware design is a challenging task due to its complexity. The processing power requirement for VBSME depends on many factors such as frame size, frame rate and search area. In video coding standards these features are allowed to vary, depending on the requirements of the application. In this paper, a scalable and low cost approach is proposed for designing the VBSME which allows us to tailor the architecture for different applications requirements and implementation targets efficiently. This approach can be used in redesigning of current VBSME architectures to improve their scalability and reduce their design costs. Moreover, as this technique is not block size dependent, it can be employed in designing future coding standards with different block sizes.
Keywords :
block codes; motion estimation; video coding; VBSME hardware design; variable block size motion estimation; video coding; Adders; Automatic voltage control; Communication standards; Computer architecture; Costs; Hardware; Motion estimation; Registers; Surface-mount technology; Video coding;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, Automation and Test, 2009. VLSI-DAT '09. International Symposium on
Conference_Location :
Hsinchu
Print_ISBN :
978-1-4244-2781-9
Electronic_ISBN :
978-1-4244-2782-6
Type :
conf
DOI :
10.1109/VDAT.2009.5158147
Filename :
5158147
Link To Document :
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