Fast motion estimation using configurable and extendible processing cores

This paper presents a reconfigurable processor and an associated toolset able to generate high-performance and fast motion estimation cores for high-definition video coding applications. The presented tools include a compiler, a cycle-accurate model and a design space exploration framework. With the help of these tools the designer can generate a processor architecture and algorithm pair matched to a particular level of video coding quality and performance. Motion estimation is the most complex part of video codec standards and has a very large impact on the bit rate and quality of the coding algorithm. Current hardware is largely based on full-search approaches which have a low level of efficiency, especially for the large search ranges needed in high definition.