DocumentCode
2433543
Title
Ling adders in CMOS standard cell technologies
Author
Efstathiou, C. ; Vergos, H.T. ; Nikolos, D.
Author_Institution
Informatics Dept., TEI of Athens, Greece
Volume
2
fYear
2002
fDate
2002
Firstpage
485
Abstract
Two level carry look-ahead (CLA) and novel parallel-prefix Ling adder architectures are introduced in this paper. The adders resulting from these architectures, as well as from the well known single level CLA Ling adder architecture, are compared against traditional adders using CMOS realizations. The results reveal that Ling architectures are more attractive in several cases.
Keywords
CMOS logic circuits; adders; carry logic; circuit simulation; integrated circuit design; integrated circuit modelling; logic CAD; logic simulation; parallel architectures; CMOS realizations; CMOS standard cell technologies; Ling adders; Ling architectures; parallel-prefix Ling adder architecture; single level CLA Ling adder architecture; two-level carry look-ahead Ling adder architecture; Adders; CMOS technology; Circuits; Computer architecture; Concurrent computing; Delay effects; Encoding; Informatics; Logic; Signal generators;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems, 2002. 9th International Conference on
Print_ISBN
0-7803-7596-3
Type
conf
DOI
10.1109/ICECS.2002.1046203
Filename
1046203
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