• DocumentCode
    2433961
  • Title

    A novel division algorithm for parallel and sequential processing

  • Author

    Tatas, K. ; Soudris, D.J. ; Siomos, D. ; Dasygenis, M. ; Thanailakis, A.

  • Author_Institution
    VLSI Design & Testing Center, Democritus Univ. of Thrace, Xanthi, Greece
  • Volume
    2
  • fYear
    2002
  • fDate
    2002
  • Firstpage
    553
  • Abstract
    A new algorithm for reducing the division operation to a series of smaller divisions is introduced. Partitioning the dividend into segments, we perform divisions, shifts, and accumulations taking into account the weight of dividend bits. Each partial division can be performed by any existing division algorithm. From an algorithmic point of view, computational complexity analysis is performed in comparison with existing algorithms. From an implementation point of view, since the division can be performed by any existing divider, the designer can chose the divider which meets his specifications best. Two possible implementations of the algorithm, namely the sequential and parallel are derived, with several variations, allowing performance, cost, and cost/performance trade-offs.
  • Keywords
    computational complexity; digital arithmetic; dividing circuits; parallel algorithms; parallel architectures; accumulations; computational complexity analysis; cost/performance trade-offs; division algorithm; parallel processing; sequential processing; Algorithm design and analysis; Computational complexity; Costs; Delay; Digital signal processing; Iterative algorithms; Partitioning algorithms; Performance analysis; Power system restoration; Signal processing algorithms;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics, Circuits and Systems, 2002. 9th International Conference on
  • Print_ISBN
    0-7803-7596-3
  • Type

    conf

  • DOI
    10.1109/ICECS.2002.1046225
  • Filename
    1046225