Title :
A novel floating-gate binary signal to multiple-valued signal converter for multiple-valued CMOS logic
Author :
Berg, Y. ; Næss, Ø ; Aunet, S. ; Lomsdalen, J. ; Høvin, M.
Author_Institution :
Dept. of Inf., Oslo Univ., Norway
Abstract :
In this paper, we present a novel floating-gate binary to multiple-valued converter for use in multiple-valued (MV) digital CMOS design. Techniques for reducing power supply noise are addressed and a binary to 4 bit (radix 16) MV converter is discussed. The converter has been sent for fabrication and measured results should be available. Simulation results obtained from Matlab and SpectreS are presented.
Keywords :
CMOS logic circuits; circuit CAD; circuit simulation; digital-analogue conversion; integrated circuit design; integrated circuit modelling; integrated circuit noise; logic CAD; logic simulation; multivalued logic circuits; 4 bit; CMOS floating-gate binary to multiple-value converters; DAC; FGDA converters; FGUVMOS transistors; MV digital CMOS; many-valued logic; multiple-valued logic; power supply noise reduction; CMOS logic circuits; Capacitance; Digital circuits; Dynamic range; Fabrication; Inverters; Logic design; Logic programming; Multivalued logic; Voltage;
Conference_Titel :
Electronics, Circuits and Systems, 2002. 9th International Conference on
Print_ISBN :
0-7803-7596-3
DOI :
10.1109/ICECS.2002.1046233
