Title :
Energy and bandwidth aware mapping of IPs onto regular NoC architectures using Multi-Objective Genetic Algorithms
Author :
Bhardwaj, Kshitij ; Jena, Rabindra K.
Author_Institution :
Inst. of Eng.&Technol, DAVV, Indore, India
Abstract :
This paper presents energy and bandwidth aware topological mapping of intellectual properties (IPs) onto regular tile-based network-on-chip (NoC) architectures. One-one mapping as well as many-many mapping are being taken in to consideration between switches and tiles in the proposed approach. In view of minimizing energy and link bandwidth requirements of the NoC-based designs, the approach focuses both the computational and communication synthesis. A multi-objective genetic algorithms (MOGA) based technique is used to find optimal solution from the Pareto-optimal solutions. This technique has been implemented and evaluated for randomly generated benchmarks as well as real-life applications like multi-media system (MMS). The experimental results demonstrate savings up to 70% and 20% of energy and link bandwidth respectively. These results include performance evaluation of one-one vs. many-many mapping that clearly shows the effectiveness of the proposed approach.
Keywords :
Pareto optimisation; genetic algorithms; industrial property; network-on-chip; IP; Pareto-optimal solutions; bandwidth aware topological mapping; communication synthesis; energy aware mapping; multimedia system; multiobjective genetic algorithms; regular NoC architectures; regular tile-based network-on-chip architecture; Bandwidth; Communication switching; Computer architecture; Genetic algorithms; Intellectual property; Multimedia systems; Network synthesis; Network-on-a-chip; Switches; Tiles;
Conference_Titel :
System-on-Chip, 2009. SOC 2009. International Symposium on
Conference_Location :
Tampere
Print_ISBN :
978-1-4244-4465-6
Electronic_ISBN :
978-1-4244-4467-0
DOI :
10.1109/SOCC.2009.5335684