Title :
Simultaneous PVT-tolerant voltage-island formation and core placement for thousand-core platforms
Author :
Majzoub, Sohaib ; Saleh, Resve ; Wilton, Steven J E ; Ward, Rabab
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of British Columbia, Vancouver, BC, Canada
Abstract :
In this paper, we propose a novel approach to voltage island formation and core placement for energy optimization in manycore architectures under parameter variations at pre-fabrication stage. We group the cores into irregular "cloud-shaped" voltage islands. The islands are created by balancing the desire to limit the spatial extent of each island, to reduce PVT impact, with the communication patterns between islands. Compared to using rectangular islands, our approach leads to power improvements between 10 and 12%.
Keywords :
microprocessor chips; multiprocessing systems; PVT-tolerant voltage-island formation; cloud-shaped voltage islands; core placement; energy optimization; manycore architectures; process voltage-and temperature variation; Computer architecture; Energy consumption; Frequency; Low voltage; Manufacturing processes; Power system modeling; Process design; Temperature; Timing; Yarn;
Conference_Titel :
System-on-Chip, 2009. SOC 2009. International Symposium on
Conference_Location :
Tampere
Print_ISBN :
978-1-4244-4465-6
Electronic_ISBN :
978-1-4244-4467-0
DOI :
10.1109/SOCC.2009.5335688
