DocumentCode
2434994
Title
A CMAC neural network chip for color correction
Author
Wen, Rong-Chang ; Ker, Jar-Shone ; Kuo, Yau-Hwang ; Liu, Bin-Da ; Chang, Gao-Wei
Author_Institution
Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
Volume
3
fYear
1994
fDate
27 Jun-2 Jul 1994
Firstpage
1943
Abstract
This paper presents the design and implementation of a CMAC neural network chip used in color image reproduction systems for color correction. An effective address mapping procedure is proposed to implement the hardware architecture of CMAC model, which has the advantages of high processing speed and low chip area overhead. VHDL-based high-level synthesis approach is employed for the synthesis of logic circuit of CMAC chip
Keywords
cerebellar model arithmetic computers; circuit CAD; printers; CMAC neural network chip; VHDL-based high-level synthesis; address mapping procedure; color correction; color image reproduction systems; hardware architecture; logic circuit; printer; Brain modeling; Color; Computer architecture; Function approximation; Hardware; High level synthesis; Laboratories; Neural networks; Printing; Quantization;
fLanguage
English
Publisher
ieee
Conference_Titel
Neural Networks, 1994. IEEE World Congress on Computational Intelligence., 1994 IEEE International Conference on
Conference_Location
Orlando, FL
Print_ISBN
0-7803-1901-X
Type
conf
DOI
10.1109/ICNN.1994.374458
Filename
374458
Link To Document