Title :
An adaptive VLSI neural network chip
Author :
Zaman, Raonak Uz ; Wunsch, Donald C.
Author_Institution :
Dept. of Electr. Eng., Texas Tech. Univ., Lubbock, TX, USA
fDate :
27 Jun-2 Jul 1994
Abstract :
Presents an adaptive neural network, which uses multiplying-digital-to-analog converters (MDACs) as synaptic weights. The chip takes advantage of digital processing to learn weights, but retains the parallel asynchronous behavior of analog systems, since part of the neuron functions are analog. The authors use MDAC units of 6 bit accuracy for this chip. Hebbian learning is employed, which is very attractive for electronic neural networks since it only uses local information in adapting weights
Keywords :
CMOS integrated circuits; Hebbian learning; VLSI; adaptive signal processing; digital-analogue conversion; mixed analogue-digital integrated circuits; neural chips; 2 mum; CMOS technology; Hebbian learning; adaptive VLSI neural network chip; analog systems; digital processing; electronic neural network; multiplying-digital-to-analog converters; neuron functions; parallel asynchronous behavior; synaptic weights; Adaptive systems; Analog circuits; Artificial neural networks; Hebbian theory; Mirrors; Neural network hardware; Neural networks; Neurons; Registers; Very large scale integration;
Conference_Titel :
Neural Networks, 1994. IEEE World Congress on Computational Intelligence., 1994 IEEE International Conference on
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-1901-X
DOI :
10.1109/ICNN.1994.374523
