Integrated Magnetic Memory for Embedded Computing Systems

This paper describes a new nonvolatile memory technology being developed for embedded computing. Based on a magnetic tunneling junction (MTJ) cell, these devices will be integrated into a radiation-hard SOI CMOS process, to replace conventional flip flops and small on-chip memories. These nonvolatile memory cells will form an integral part of on-chip power management. Memory density is the primary driver for commercial MRAMs, which are designed using an X-Y addressing scheme. Current pulses on two orthogonal wires generate a magnetic field, which is strong enough to reprogram a cell at the intersection between the two wires, and nowhere else. This requires that the cells be very uniform in their sensitivity, and optimized for magnetic "selectivity," so that only the desired cells are programmed. Designed as replacements for flip-flops and latches, the Embedded Magnetic Memory uses a pair of MTJ cells in a differential scheme. The differential arrangement mitigates concerns of process variation, but introduces a new set of challenges. Each cell will be programmed by a single current pulse. The challenge is to design the cells and the programming structures to make efficient use of the magnetic field, and minimize programming current.