Title :
Implementation of piecewise-linear DC analysis in APLAC
Author :
Roos, Janne ; Valtonen, Martti ; Virtanen, Jarmo
Author_Institution :
Dept. of Electr. & Commun. Eng., Helsinki Univ. of Technol., Finland
Abstract :
Recently, we have developed many extensions to the piecewise-linear (PWL) DC analysis method. In this paper, working solutions are proposed for filling the gap between the academically oriented method and real-world DC-simulation problems. Thanks to the solutions proposed, our PWL DC analysis method is, finally, general and efficient enough to be implemented in a general-purpose circuit simulator. This paper describes the APLAC implementation of our PWL DC analysis method. The method is combined with the conventional DC analysis method of APLAC in a robust and user-friendly manner. The operation of the APLAC implementation is demonstrated with simulation examples.
Keywords :
circuit simulation; iterative methods; nonlinear network analysis; piecewise linear techniques; APLAC; convergence-aiding strategies; general-purpose circuit simulator; nonlinear circuit; piecewise-linear DC analysis; real-world DC-simulation problems; Circuit simulation; Circuit theory; Convergence; Filling; Laboratories; Nonlinear circuits; Nonlinear equations; Piecewise linear techniques; Robustness; Voltage control;
Conference_Titel :
Electronics, Circuits and Systems, 2002. 9th International Conference on
Print_ISBN :
0-7803-7596-3
DOI :
10.1109/ICECS.2002.1046453
