• DocumentCode
    2438164
  • Title

    Impact of negative bias temperature instability on product parametric drift

  • Author

    Reddy, Vijay ; Carulli, John ; Krishnan, Anand ; Bosch, William ; Burgess, Brendan

  • Author_Institution
    Texas Instrum. Inc., Dallas, TX, USA
  • fYear
    2004
  • fDate
    26-28 Oct. 2004
  • Firstpage
    148
  • Lastpage
    155
  • Abstract
    A systematic test methodology is presented that comprehends the impact of negative bias temperature instability on product parametric drift. In specific NBTI degradation mechanisms in digital CMOS circuits and transistors are presented. A test guard-banding technique to estimate parameter drift under BI and customer use conditions is also given.
  • Keywords
    CMOS digital integrated circuits; MOSFET; integrated circuit reliability; semiconductor device reliability; thermal stability; degradation mechanisms; digital CMOS circuits; negative bias temperature instability; parameter drift estimation; product parametric drift; test guard banding technique; transistors; CMOS digital integrated circuits; Circuit testing; Degradation; Integrated circuit testing; MOSFETs; Negative bias temperature instability; Niobium compounds; System testing; Titanium compounds; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 2004. Proceedings. ITC 2004. International
  • Print_ISBN
    0-7803-8580-2
  • Type

    conf

  • DOI
    10.1109/TEST.2004.1386947
  • Filename
    1386947
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2438164