• DocumentCode
    2438714
  • Title

    A new probing technique for high-speed/high-density printed circuit boards

  • Author

    Parker, Kenneth P.

  • Author_Institution
    Agilent Technol., Loveland, CO, USA
  • fYear
    2004
  • fDate
    26-28 Oct. 2004
  • Firstpage
    365
  • Lastpage
    374
  • Abstract
    Bullock in 1987 [Bull87] provided design-for-test (DFT) rules for probing printed circuit boards for in-circuit testing. Many of these rules stand in good stead even today. However, recent technical advances in operational board speed are leading some to believe that in-circuit testing cannot be performed on the high-speed sectors of boards soon to be designed. Due to the increasing usage of high-speed circuitry, there is worry in our industry that in-circuit testing is marginalized with no good substitute available. It is the purpose of This work to show how access can be maintained, even on highly dense gigabit logic boards.
  • Keywords
    design for testability; printed circuit testing; DFT rules; design for test; gigabit logic boards; high density printed circuit boards; high speed circuitry; high speed printed circuit boards; in-circuit testing; probing technique; Circuit testing; Design for testability; Fixtures; Logic testing; Performance evaluation; Pins; Printed circuits; Probes; Resistors; Switches;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 2004. Proceedings. ITC 2004. International
  • Print_ISBN
    0-7803-8580-2
  • Type

    conf

  • DOI
    10.1109/TEST.2004.1386972
  • Filename
    1386972