Impact of Process Variations on Reliability and Performance of 32-nm 6T SRAM at Near Threshold Voltage

Power consumption has become a major concern of integrated circuit (IC) design, especially for SRAM design. Reducing the supply voltage to the near-threshold region is one method to reduce the power consumption. However, operating in this region makes the circuit more sensitive to process variations. In this paper, the impact of process variations on a 32-nm 6T SRAM cell under near-threshold voltage is studied using Monte Carlo simulations to evaluate the potential for soft errors. The double-exponential current source is used to simulate the strike of an ionizing particle onto nodes of interest. The results show that threshold voltage variability is a more significant parameter affecting the critical charge distribution of the circuit under both near-threshold voltage and nominal supply voltage. Also under near-threshold voltage, the leakage power in standby mode is reduced compared to the nominal supply voltage, and the write delay time of the SRAM circuit is much larger than the nominal supply voltage.