DocumentCode :
243899
Title :
A Low-Noise Variable-Gain Amplifier for in-Probe 3D Imaging Applications Based on CMUT Transducers
Author :
Attarzadeh, Hourieh ; Ytterdal, Trond
Author_Institution :
Dept. of Electron. & Telecommun., Norwegian Univ. of Sci. & Technol., Trondheim, Norway
fYear :
2014
fDate :
9-11 July 2014
Firstpage :
256
Lastpage :
260
Abstract :
This paper presents the design of a low power low noise variable gain amplifier(VGA) interface circuit. The VGA circuit proposed is designed for interface with Capacitive Micro-Machined Ultrasonic Transducer (CMUT). Due to the small area and low power consumption, the circuit is suitable for in-probe imaging where the VGA is interfaced with the in-prob ADC which does all the digital conversion inside probe. The VGA circuit maps the attenuated received signal from CMUT to the full dynamic range of the ADC. The circuit is able to produce a differential output from an ultrasound sensor which is based on a Zero-Bias CMUT, where the requirement for an external high voltage dc bias is eliminated. Therefore, the single to differential conversion is carried out through steering the current from both the electrodes of the CMUT without the need for high voltage design. The VGA is designed and simulated with 65nm CMOS technology. The VGA gain varies in linear from 0 -- 20db. A noise figure (NF) of 3dB for a CMUT with 5MHz center frequency is estimated, where the power consumption of only 80uW and the total area of 0:008mm2 is achieved which makes it perfect for the interface to the in probe ADC circuit. The circuit layout design is based on the standard unit shapes which results in pattern regularity and density uniformity. This will assure the result from the post-layout simulation close to the pre-layout simulation and also gives a better matching in the layout.
Keywords :
CMOS analogue integrated circuits; capacitive sensors; circuit simulation; integrated circuit layout; integrated circuit noise; low noise amplifiers; ultrasonic imaging; ultrasonic transducers; CMOS technology; CMUT transducers; VGA circuit; capacitive micromachined ultrasonic transducer; circuit layout design; in probe ADC circuit; in-probe 3D imaging applications; low-noise variable-gain amplifier; noise figure; post-layout simulation; prelayout simulation; size 65 nm; Imaging; Impedance; Layout; Noise; Power demand; Transducers; Ultrasonic imaging; 3D ultrasound imaging receiver; CMUT; Low power circuit; Time Gain Compensator amplifiers(TGC);
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI (ISVLSI), 2014 IEEE Computer Society Annual Symposium on
Conference_Location :
Tampa, FL
Print_ISBN :
978-1-4799-3763-9
Type :
conf
DOI :
10.1109/ISVLSI.2014.113
Filename :
6903371
Link To Document :
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