Title :
Research and Implementation of Embedded Layout Accelerator Based on Multi-Cores System
Author :
Li, Qing Cheng ; Yang, Liu ; Bai, Zheng Xuan ; Gong, Xiao Li ; Jin, Zhang
Author_Institution :
Coll. of Inf. Tech. Sci., Nankai Univ., Tianjin
Abstract :
In this paper, our work is to frame multi-core processors systems which complete parsing PDF, and in order to parse quickly, we also design hardware accelerator for the graphics rendering engine which are time-consuming most. The final implementation of the system has been tested using a Xilinx University Program Virtex-II Pro Development Board, which features a Virtex-II Pro XC2VP30 Speed Grade -7 FPGA.
Keywords :
computer graphic equipment; embedded systems; field programmable gate arrays; grammars; microprocessor chips; Virtex-II Pro Development Board; Virtex-II Pro XC2VP30 Speed Grade -7 FPGA; embedded layout accelerator; graphics rendering engine; multicore processors systems; parsing PDF; Books; Displays; Embedded system; Field programmable gate arrays; Hardware; Multicore processing; Multiprocessing systems; Parallel processing; Rendering (computer graphics); System testing;
Conference_Titel :
Computational Intelligence and Industrial Application, 2008. PACIIA '08. Pacific-Asia Workshop on
Conference_Location :
Wuhan
Print_ISBN :
978-0-7695-3490-9
DOI :
10.1109/PACIIA.2008.327
