• DocumentCode
    2439065
  • Title

    A Flexible High Throughput FPGA Based Prototype Platform for RW Channel Development

  • Author

    Jakka, Bhasker ; Dash, Dillip ; Yalcin, Caner ; Dang, Ly ; Mire, Omar ; Cometti, Aldo

  • Author_Institution
    STMicroelectronics Inc., San Diego, CA, USA
  • fYear
    2009
  • fDate
    23-26 June 2009
  • Firstpage
    41
  • Lastpage
    47
  • Abstract
    It is difficult to model all effects of magnetic channel for performance simulations. Verifying in a real environment becomes especially critical when algorithms rely on special properties of the Read/Write Channel (RWC) for magnetic recording systems. A self contained flexible FPGA based prototype platform has been developed for RWC digital architecture and performance evaluation for Hard Disk Drive (HDD) applications. The developed platform consists of all required hardware and software components like HDD for storing and retrieving information, ASIC Channel front-end (CFE) for samples equalization and optimization, Channel Back-End (CBE) using FPGAs for algorithm and architectural exploration and software tools to control and measure the performance. It achieves the throughput of 3.4 Billion sectors per day which is about 4000 times faster than the computer simulations with Matlab/C models on a high performance computer. This allows running RWC system operation with actual HDD. The overall FPGA based platform provides an extremely powerful development tool of RWC for HDD application.
  • Keywords
    application specific integrated circuits; disc drives; field programmable gate arrays; hard discs; information retrieval; information storage; magnetic storage; optimisation; performance evaluation; ASIC Channel front-end; HDD; Matlab/C models; RW channel development; channel back-end; digital architecture; flexible high throughput FPGA; hard disk drive; information retrieval; information storage; magnetic recording systems; optimization; performance evaluation; read/write channel; Application software; Computer architecture; Field programmable gate arrays; Magnetic properties; Magnetic recording; Mathematical model; Prototypes; Software prototyping; Software tools; Throughput;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Rapid System Prototyping, 2009. RSP '09. IEEE/IFIP International Symposium on
  • Conference_Location
    Paris
  • ISSN
    1074-6005
  • Print_ISBN
    978-0-7695-3690-3
  • Type

    conf

  • DOI
    10.1109/RSP.2009.38
  • Filename
    5158497