DocumentCode
2439431
Title
The Optimization Implementation of High Performance Video Decoder Based on C6416 DSP
Author
Ma, Li ; Song, Jianbin ; Li, Ping ; Wang, Xiuying
Author_Institution
Autom. Coll., Beijing Union Univ., Beijing, China
fYear
2010
fDate
7-9 May 2010
Firstpage
4890
Lastpage
4893
Abstract
With the development of the multimedia and network technology, video applications such as VOD, video-phone etc. are used more and more widely in our life. Consider by the high performance and easy implementation, we select TMS320 c6416 DSP platform and implement the MPEG-4 decoder. Based on the architecture and instruction characteristic of DSP, structure-level, program-level, code-level optimization was conducted respectively. Experimental data show that the decoder implemented can decode video in real time efficiently.
Keywords
digital signal processing chips; optimisation; video coding; MPEG-4 decoder; TMS320 c6416 DSP platform; VOD; code-level optimization; high performance video decoder; optimization implementation; program-level; structure-level; videophone; Decoding; Digital signal processing; IEC standards; ISO standards; Streaming media; Transform coding; Video coding; DSP; MPEG-4; optimization implementation; video decoder;
fLanguage
English
Publisher
ieee
Conference_Titel
E-Business and E-Government (ICEE), 2010 International Conference on
Conference_Location
Guangzhou
Print_ISBN
978-0-7695-3997-3
Type
conf
DOI
10.1109/ICEE.2010.1228
Filename
5592825
Link To Document