Title :
HARS: A High-Performance Reliable Routing Scheme for 3D NoCs
Author :
Jun Zhou ; Huawei Li ; Yuntan Fang ; Tiancheng Wang ; Yuanqing Cheng ; Xiaowei Li
Author_Institution :
State Key Lab. of Comput. Archit., Inst. of Comput. Technol., Beijing, China
Abstract :
The poor yield of current available processes for Through-Silicon Via (TSV) fabrication leads to serious influence on the robustness of the vertical communications in 3D NoCs. The fault-tolerant routing scheme has been regarded as an effective mechanism to ensure the performance of 2D NoCs. In this paper, we propose a high-performance reliable routing scheme HARS, which is deadlock-free by obeying a mid-node-searching method raised for 3D Mesh NoCs without requiring any Virtual Channels (VCs). In HARS, we adopt DyADM routing, extending the classical 2D routing algorithm DyAD to 3D scenario in presence of permanent faults on the vertical links. HARS is able to support both one-fault and multi-fault models. The experimental results show that HARS has better performance, improved reliability and lower overhead compared to the state-of-the-art reliable routing schemes.
Keywords :
fault simulation; integrated circuit design; integrated circuit modelling; integrated circuit reliability; network routing; network-on-chip; three-dimensional integrated circuits; 3D mesh NoCs; DyADM routing; HARS; high-performance reliable routing scheme; mid-node-searching method; multifault model; networks-on-chip; one-fault model; reliability; Fault tolerance; Fault tolerant systems; Routing; System recovery; Three-dimensional displays; Through-silicon vias; 3D Mesh; Networks-on-chip; fault-tolerance; reliability; routing scheme;
Conference_Titel :
VLSI (ISVLSI), 2014 IEEE Computer Society Annual Symposium on
Conference_Location :
Tampa, FL
Print_ISBN :
978-1-4799-3763-9
DOI :
10.1109/ISVLSI.2014.56
