Title :
A Feedback, Runtime Technique for Scaling the Frequency in GPU Architectures
Author :
Yue Wang ; Ranganathan, Nagarajan
Author_Institution :
Dept. of Comput. Sci. & Eng., Univ. of South Florida, Tampa, FL, USA
Abstract :
This paper presents a dynamic frequency scaling (DFS) technique, PIDDFS, targeting on real-time applications running on GPU platforms. PIDDFS technique applies a feedback controlling algorithm, Proportional-Integral-Derivative (PID), to scale the frequencies of core domain and DRAM domains based on memory access statistics. The major goal of PIDDFS is minimizing the energy consumption while the memory traffic is intensive or even causes the pipeline to stall. Performance can also be improved via increasing the frequency while the memory traffic is in a starving status. Based on the feedback, closed-loop controlling model with proper leading and lagging phases, PIDDFS can respond timely towards the variations during runtime and ignore the insignificant noise that causes unnecessary frequency adjustments. The proposed technique has been simulated on GPGPU-Sim, a cycle-level simulator of GPU architecture and power savings have been modeled by GPUWattch. According to the benchmark simulation result, a power saving of more than 23% with a performance improvement of 4% is achieved at the same time. Stalled cycles caused by saturation of memory request queues are reduced over 40%.
Keywords :
circuit simulation; closed loop systems; energy consumption; graphics processing units; parallel architectures; performance evaluation; pipeline processing; power aware computing; real-time systems; three-term control; GPGPU-Sim; GPU architectures; GPUWattch; PID algorithm; PIDDFS technique; closed-loop controlling model; cycle-level simulator; dynamic frequency scaling; energy consumption minimization; feedback controlling algorithm; memory request queue saturation; memory traffic; performance improvement; power savings; proportional-integral-derivative algorithm; real-time applications; runtime technique; Benchmark testing; Clocks; Frequency control; Graphics processing units; Hardware; Instruction sets; Dynamic Frequency Scaling; GPU; PID controller;
Conference_Titel :
VLSI (ISVLSI), 2014 IEEE Computer Society Annual Symposium on
Conference_Location :
Tampa, FL
Print_ISBN :
978-1-4799-3763-9
DOI :
10.1109/ISVLSI.2014.34